Veda - VLSI Engineering&Design Automation

Syllabus for MS in VLSI Engineering (Part Time)

First Year - First Semester

VLSI 101	Advanced Digital Design
VLSI 102	Unix and Scripting Languages
VLSI 103	Hardware design and simulation using Verilog
VLSI 104	Shell and Scripting Languages Lab
VLSI 105	HDL - Verilog Lab

First Year - Second Semester

VLSI 201	Advanced System Design
VLSI 202	VLSI Synthesis, Test and Design for Testability
VLSI 203	VLSI ASIC Synthesis Lab
VLSI 204	FPGA Synthesis Lab
VLSI 205	Advanced Verilog Lab

Second Year - Third Semester

VLSI 301	VLSI Architecture for RISC Processors & DSPs
VLSI 302	HLLs-C and C++
VLSI 303	DSP & RISC Programming Lab
VLSI 304	C and C++ Lab
VLSI 305	DFT, ATPG & FV Lab

Second Year - Fourth Semester

VLSI 401	Verification Methodologies
VLSI 402	Interface Protocols and Contollers
VLSI 403	VLSI Physical Design and SoCs
VLSI 404	Verification Lab
VLSI 405	Physical Design Lab

Third Year - Fifth and Sixth Semesters - VLSI 501 Industry Live Project(s)/ On job project(s)

	Project work( half semester)
	Seminar on the project work
	Project work evaluation, Application of Transferable Skills to the project

	Project work( half semester)
	Seminar on the project work
	Project work evaluation, Application of Transferable Skills to the project

	Project work( half semester)
	Seminar on the project work
	Project work evaluation, Application of Transferable Skills to the project

	Project work( half semester)
	Seminar on the project work
	Project work evaluation, Application of Transferable Skills to the project

	Project(s) dissertation and Viva at the end of 6th semester
	Project Seminar